Compute and Memory

What Is PCIe? How Computers Connect GPUs and Other Hardware.

By Rodolfo Garcia Calderoni, CFA ·

On this pageWhat Is PCI Express?Key TakeawaysHow Does PCIe Work?What Are PCIe Lanes?PCIe Generations ExplainedPCIe vs. NVLinkWhy Does PCIe Matter for Physical AI?Frequently Asked QuestionsThe Bottom LineSourcesRelated terms

What Is PCI Express?

Peripheral Component Interconnect Express, commonly called PCIe, is a high-speed communication standard used to connect components inside computing systems.

PCIe is widely used for graphics processors, storage devices, networking adapters, and specialized computing accelerators.

In AI computing, PCIe often provides communication between CPUs and attached GPUs.

For example, a server training a robotics vision model may transfer information between system memory and a GPU through a PCIe connection.

Key Takeaways

  • PCIe is a high-speed interconnect used to attach computing devices.
  • Its available bandwidth depends on generation, lane count, and system capabilities.
  • Faster PCIe connections can reduce data-transfer bottlenecks but do not automatically increase a processor's internal computing speed.

How Does PCIe Work?

Imagine a computer containing a CPU and a dedicated GPU.

The two components need to exchange information.

PCIe provides a standardized communication link.

Information is divided into data packets and transferred across the connection.

PCIe uses high-speed serial communication lanes.

A device may use one lane or multiple lanes operating together.

The actual connection depends on the capabilities of the processor, motherboard, device, and software.

What Are PCIe Lanes?

PCIe configurations are commonly described using lane counts such as:

  • x1
  • x4
  • x8
  • x16

A larger lane count can provide greater aggregate bandwidth within the same PCIe generation.

For example, a GPU commonly uses a x16 connection.

An SSD may use a x4 connection.

However, physical connector size does not always indicate the electrical lane count actually available.

PCIe Generations Explained

Newer PCIe generations generally increase the transfer rate per lane.

For example:

PCIe 4.0: Up to 16 gigatransfers per second per lane.

PCIe 5.0: Up to 32 gigatransfers per second per lane.

PCIe 6.0: Up to 64 gigatransfers per second per lane using a different signaling approach.

These are raw transfer rates, not directly equivalent to application-level data throughput.

Devices and hosts must support compatible operating modes.

A newer PCIe device connected to an older system may operate at the lower supported generation.

PCIe vs. NVLink

PCIe is a general-purpose interconnect used across many computing devices.

NVLink is NVIDIA's specialized interconnect for high-performance communication between compatible processors.

For example, a GPU may communicate with its host computer through PCIe while using NVLink for selected communication with other GPUs.

The technologies can complement each other.

Why Does PCIe Matter for Physical AI?

AI systems often move large amounts of information between processors, storage, and accelerators.

A slow connection can increase transfer time.

For example, repeatedly moving camera data or model tensors between CPU memory and a GPU may become expensive.

Efficient software tries to avoid unnecessary transfers, and suitable PCIe capacity can help when transfers are required.

Frequently Asked Questions

Does PCIe 5.0 make a GPU twice as fast as PCIe 4.0?

No. It doubles the theoretical per-lane transfer rate, but actual application performance depends on whether PCIe bandwidth is a bottleneck.

Can a PCIe device work with an older PCIe generation?

Often, yes, because PCIe supports backward compatibility across many generations. Performance is limited by the negotiated connection.

The Bottom Line

PCIe connects the processors, storage devices, and accelerators that make modern computing systems work. Its bandwidth matters when data movement becomes a constraint on AI performance.

Sources

  1. PCI-SIG — PCI Express 6.0 Specification

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